11. Diode Bridge Part Three


Part one and part two showed a working diode bridge, there are spikes but a first settling time measurement can be tried.



Left - sampling bridge driver board soldered together with the diode bridge board.



Board mechanically reinforced.



Middle - settle node diode network




BNC Terminal - Residue amplifier output
15pF capacitor - test with different skew compensation capacitors
I'am still using the DIP-8 sockets, I wan't to test different amplifiers.




Power comes with SMB connectors, a small fast connecting system.



Test with Open and Grounded Bridge Input


The long horizontal epoxy bridge with input signal.


   
Open bridge input result in a very high residue amplifier output of 500mV Peak.        Grounded Bridge Input, switching peaks are lower, window-ON settling is much better

May be the Window-ON settling problem caused by radiation, radiation good visible under high impedance nodes.




Grounding the Bridge Input.



Voltage Reference and 16 Bit DAC Assembling


Choosing a xxxx DAC configured for a full scale step of 0V to +10V.
The DAC xxxx is an easy to apply 16 Bit DAC and has a build-in xxxx output amplifier.
Using a xxxx as voltage reference for the DAC.


Left - the DAC is not very easy to solder, but a SO-36 package is still solderable in such a way for fast prototyping. DAC xxxx build-up in a configuration for a 0V to 10V output full scale step. Vref must be -10V. A 16 bit DAC has a minimum resolution of 10V / 65535 = 152µV = 1LSB.




Middle - Settling Node




The precision resistors are from 1985, pre aged when used in 2008. I can't cut wires of precision resistors - sorry.



First DAC Settling Time Measurement


       Left Photo with 16 LSB/DIV  (1200µV/DIV)                             Right Photo with 6.5 LSB/DIV (500µV/DIV) - Oscilloscope Amplifier Out of Range


CIRCUIT WORKS ! - NOT EXCELLENT - BUT ALREADY USEABLE

  • Top 5 V Trace - Load DAC - (Oscilloscope triggers on first horizontal Division)
  • Middle 5 V Trace - Sampling Window
  • Bottom 20&50 mV Trace - Gated Settling Waveform


With a 18pF Compensation Capacitor the DAC amplifier seems to be overcompensated. The amplifier slews very fast, comes with a 12 LSB overshooting and settles after approximately 4.5µs. (Measurement without bridge driver/residue delay correction). (Unfortunately today the left bottom scope readout is broken - shows no "V" only a dot).


This is the target - a reduced switching transient



6.5 LSB/DIV    500µV/DIV     Cfb=18pF     0V to 10V step

1 LSB AT Settle Node = 76µV  ( 152µV AT DAC Amplifier Output )

I don't like my spikes.
  


Increasing the compensation capacitor

     
Left Photo with 16 LSB/DIV  (1200µV/DIV)                                                               Right Photo with 6.5 LSB/DIV (500µV/DIV)

In both photos capacitor increased to 22pF, settles very nicely but it's already overdampened. Using a 7A11 amplifier with 20 MHz bandwidth. Oscilloscope Amplifier slightly out of range (for all 20mV/DIV measurements), a high OFF spike.




   
                                 Photo with 6.5 LSB/DIV (500µV/DIV)                                                                     Photo with 6.5 LSB/DIV (500µV/DIV)

Left photo compensated with a small adjustable trimmer capacitor                                             Right photo compensated with many parallel small ceramic capacitors

Settling Time about 2 to 2.5µs, oscilloscope triggered on Load DAC (Top Trace - first horizontal division). Using a 7A11 with 20 MHz. Right photo ON spike readjusted. Compensation is a demanding task, even one or two picofarad has enourmous influence.





Center - Settling Time trimmed with adding small capacitors piece by piece.




                             Photo with 6.5 LSB/DIV (500µV/DIV)

Testing the OP xxxx as Sampling Bridge Driver, result looks like the same with OP xxxx.




Photo with 6.5 LSB/DIV (500µV/DIV)

TOP TRACE - Load DAC, oscilloscope trigger
SECOND TRACE - Sampling Window
THIRD TRACE - DAC Output Signal
FOURTH TRACE - Gated Settling Time Signal



Settling Time approximately 2µs for a full scale step.


Summary and Outlook


Circuit works and is useable with under basic functions. It was a hard work building up the board and it took enough time. Experience is the gain.

The spikes need to be reduced, for this I must think much about the layout and where which current is flowing - it is still possible changing the board.  At the moment my ideas are empty-

Another idea is the use of other transistors and diodes.

   


These transistors are terrible small and difficult to solder.


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